DWMC-16: Instruction Set V0.8 and New Plans – Deprecated

Its been a while since my last post here and I have just finished yet another revision of the Instruction Set as well as made new Plans when it comes to the DWMC-16…

Instruction Set V0.8

I have decided that I am going to throw out the 32 bit operations that I had added in the 0.7 version. They are something that I can easily do as a subroutine, so why add more complications for me?

I also added a hlt operations to halt the systems activity once it is invoked, only to continue after an interrupt or a reset.

New Plans and Revisions

I have also used the time to do some revisions of the DWMC-16, though those are something for a follow-up post.

Needless to say, I have done a revision of the memory layout and returned the system back to memory mapped IO, rather than using a specific IO flag. I’ve also moved some RAM into the first 64 kiWords of the memory space, which contains some ‘fast access’ System/OS memory that will largely be taken up by memory for the OS. It will also contain the Stack, starting at 0x00FFFF and going down. The Stack Pointer can now also not be moved, so that I can reduce the size of the Stack Pointer down to 16 bits, allowing me to move the Flag Register into the place of the old SPH register.

I’ve also removed the new X 32 bit register, and moved the Y register, taking the time to turn it into a Y Index register. Currently I am wondering if I should add the possibility to increment/decrement both Index registers automatically. That might add user definable stacks to the system.

I’ve also started to think I should, at least, add a DMA controller to the system, which can work either in cycle stealing mode and do DMA requests when the CPU does not use the bus, as well as in a dedicated mode, where the CPU hands over control of the bus to the DMA controller and allows it to quickly move data.

Then, there is the potential to add a Memory Management Unit that can switch out the upper 8 MiWord of memory around to increase the system memory.

Finally, I’ve done some thinking about the IO space, which will be housed in the 64 kiWord memory segment from 0x010000 to 0x01FFFF. Here, I am thinking of using the first 1 kiWord of space to allow the system access to several build-in modules, such as DMA controller, MMU and the blikenlights panel. Other modules will then populate the following space, each of which will take 1, 2, 4 or 8 kiWord of space. It will identify itself through the first one or two Word to the OS, with some of the space it requests being used by a firmware ROM, containing the software needed to use it, written to fit an API design, so that the access to these modules/devices can be standardised for the OS.


In the future, I will be making a number of new posts and do a whole lot of more revisions. I’m also going to throw out my initial thoughts on the ALU and its design and completely revise it.

One thing is for sure, I will need to do a more thorough write up of my design, before I am even going to think about continuing my work on the DWMC-16 emulator or the hardware.

I might be able to write a fist Assembler and Disassembler though…

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