Categories DWMC-16 - Depracated

DWMC-16: Thoughts on Register Hardware – Deprecated

Basic Register Module

With me designing the first Basic Register Module, I’ve come to realise that they can’t be used everywhere where I use registers. The Basic Register Module is meant to be used for the basic use registers for the DWMC-16, R00 to R07, as well as the ZH and ZL registers, and I designed it first, because I think it was relatively straightforward to design in general.

But there are other Register Modules that I will need to design to use on the DWMC-16.

ALU Register Module

Following the Basic Register Module, the ALU registers are about as easy to design. Only in this case, rather than have the data input and output going over the same pins, I need them going over two different pins. This is because I need to directly push the data into the ALU after it was written into the register. On the other hand, I can get rid of the Read Enable pin, since the ALU can already use the data if it needs to. The Read Enable Phase is handled on the output of the ALU.

Since I am trying to minimise the number of different components I am using, I want to use the same 32 pin DIN41612 connector for this module as for the Basic Register Module. But since I would need 32 pins for the 16 bits of the register alone, I have decided I am going to instead design the ALU Register Module as an 8 bit module, even if that doubled the number of modules used in the ALU.

Test & Flag Register Module

Both the Test and Flag Registers are similar in nature. They both need to be able to be written and read randomly, via Read and Write Enable. And they need to be tested whether a single bit in the register is set or not, and return a single signal. The only difference is that the Flag Register needs to take inputs from the outside, independent of the Write Enable and a clock signal.

The testing of bits is relatively simple, by simply a multiplexer selecting the bit in question from an 4 bit signal, which is then combined via and AND gate with the selected bit. The AND gates of all register bits are then combined via an OR gate and output via single pin.

From a look at the data pins, this makes 16 data pins, three Enable pins, four bit select inputs and a ‘bit set’ output. That is 24 pins, which together with eight power pins (four +5V and four GND pins) makes exactly 32 pins. So far so good. But once I want to set the flags in the Flag Register, this is increasing by another at least 13 pins at the moment.

And since I still want to use the same 32 pin DIN41612 connector, and because the circuit is more complex than that of the Basic Register Module, I will also split these modules into two 8 bit Modules. I’m also using the same modules for both registers, as the only difference between them is that the bits can be set independently from the system and would be left turned off in the Test Register. Most likely, I will use a single extra pin on the connector to set to high, or low, to switch the pins on and off.

Program Counter & Stack Pointer Register Module

Again, the Program Counter and Stack Pointer Registers are similar enough. Again, they need to be read and written randomly, via Read and Write Enable. But simultaneously, they need to be counted up, and, in the case of the Stack, down.

In essence, however, they differ from the other registers, in that they are more counters than normal registers. Counters that I need to be able to load up with a value, but I believe that to be relatively simple. Additionally, at least the Stack Pointer Register needs to be able to count up and down, while the Program Counter Register only needs to count down. So, why not simply design for the Stack Pointer Register with a synchronous up/down counter, and then permanently set the pin used to indicate up/down to low or high?

This does simplify the design, but in this case it is more of a problem of complexity of the circuit that I will likely have to take care of that makes me, once again, split any 16 bit register module into 8 bit register modules. And since the PCH and SPH registers are only 8 bits wide anyway, I can deal with just six modules in this case, with the other eight bits of the register permanently set to low if the register is read.


In essence, this means I need to design three more register modules that I can then use, but it’s better that I think about that now, than when I have built a bunch of Basic Register Modules and realise that I can use all of them.

For the moment, I will need the following amounts of modules:

10Basic Register Module
4ALU Register Module
4Test & Flag Register Module
6PC & SP Register Module

And all of them will plug into one form of active logic back plane or another. Each of which in turn plugs into the main bus back plane…

This is going to be fun.

However, I have fully decided to use mostly readily available or at least documented mechanical hardware for the 19 inch ECB Bus chassis. Even if I will not use the ECB Bus specifications themselves.

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