DWMC-16: A DIWhy MiniComputer Project – Deprecated

This is something completely different to what I originally meant to do with this page/blog, which was to have a place to put my creative fiction work.

But lately, maybe inspired by the stuff I’ve been reading lately, combine with copious amount of time to thing at a job I can do on autopilot, has made me come to this conclusion.

I really want to build a 16 bit minicomputer from scratch. From the ground up.

From the small instruction set, over the logic design, to the circuits and the etched (or CNC cut) PCBs.

Maybe I should blame Usagi Electronic for part of the idea, with his tube based 1 Bit Computer, or his series about the Centurion Minicomputer. Maybe I should blame some of the books that I read recently, about the early times of computing and the authors waxing poetically about the likes of Whirlwind, the TX-0 or the PDP-1 and PDP-8…

Though, while I plan to do it in mostly discrete electronics, drawing the line at memory and I/O, O don’t think that I’ll use tubes. I’m currently still debating whether I will use Diode Transistor logic or Transistor Transistor logic.

I’m also wondering how far I get with this before boredom sets in, or I find a new shiny thing…

Planned Features

Basic Design

  • 16 bit Von Neuman architecture
  • Small instruction set, 16 bit wide + 32 bit for direct addressing
  • 24 bit address space (16MWords, 16M x16)
  • Memory Mapped IO
  • Discrete Logic, either DTL or TTL

CPU Features

  • Register-to-Register architecture
  • 32x 16-bit registers saved into RAM
    • Inspired by the Texas Instruments TMS9900, as used in the TI-99
    • This means that the CPU would natively support context switching by simply changing the base address of the registers in RAM
  • Stack Pointers
    • There should be at least 32, one for every context
  • Instruction Pipeline to enable a 1 instruction per CPU cycle
    • This means that a CPU cycle would be different from the clock cycle
  • Interrupt handling
    • If registers are saved to RAM, this allows handling of N interrupts by switching the entire CPU context directly from the currently running context to an Interrupt Handling context, in the same time it needs to switch regular contexts.

Design questions

But the basic planned features bring their own questions.

DTL or TTL logic? What makes sense for low part count and/or speed? I have already looked into it, and DTL can be sped up by Schottky diodes. Either way, I will need to build a few circuits for testing, especially if I want to get a high speed for the CPU, hopefully at least 1MHz.

I also want to reduce part count and work for me, by not building everything out of DIY discrete circuits. For one, it does not make sense to build my own memory, when I can get static memory ICs for cheap, especially 16 bit wide memory ICs, like the ISSI IS61LV6416, a 1MBit (64k x 16) SRAM memory IC. Same goes for a ROM area. I initially thought about using an EPROM or a parallel addressed EEPROM, until I checked if there are small FLASH memory ICs around, which there are, in sizes of 512kBit to 4MBit. Sure they are 8 bit wide data wise, but they are cheap and I would just need 2 anyway.

Any periphery would certainly be no discrete. Like mass storage or I/O. And I certainly plan to add a parallel character LCD, which should very easily be addressable, with a small character keyboard attached to it, which I can easily implement with a micro-controller. Same goes for mass storage, serial I/O and the like. Additionally, I should be able to implement some I/O, or things like timers and the like, easily with existing periphery ICs and certainly adapt existing circuits as used by e.g. the RC2014.

Mass storage might be fun to implement as SSD, SD card or USB stick.

As for the memory… Should the Register and Stack be located in the lower RAM from 0x000000? Or would it be better to locate them in the high RAM, somewhere around 0xFFFXXX?

That leaves software…

I certainly need to at least create some sort of monitor program for initial work. Later on, I could then implement a simple OS, maybe something along the line of an implementation Minix. But that is something to think of later on…

First, I need to see just how viable any of my ideas are in the first place…


A big reason to just go and put this stuff here is so that I have more documentation of this project than of any of my previous projects. And if another new shiny thing comes along, these posts will help me get back to speed on the design of the DWMC-16.

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